EV8049S-U-00A 24v 5.5a quad channel power half-bridge evaluation board ev8049-u-00a rev. 1.0 www.monolithicpower.com 1 10/30/2012 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2012 mps. all rights reserved. the future of analog ic technology general description the EV8049S-U-00A is the evaluation board for the mp8049s, a high current, quad channel power half-bridge. it accepts pwm modulated inputs for operation that that can be configured as the stereo btl output stage of a class-d audio amplifier. the mp8049s features a low current shutdown mode, standby mode, input under voltage protection, current limit, thermal shutdown and fault flag signal output. all channels of drivers interface with standard logic signals. the mp8049s is available in a 40 lead qfn 5x5 package. electrical specifications parameter symbol value units supply voltage v dd 5 ? 26 v peak output current i peak 5.5 a features ? 5v to 26v vdd ? 5.5a peak current output ? up to 1mhz switching frequency ? protected integrated power 0.14 ? switches ? 10ns switch dead time ? all switches current limited ? internal under voltage protection ? internal thermal protection ? short-circuit protection ? fault output flag ? bridge tied load output power: 37w/channel at 24v, 8 ? applications applications ? flat tv ? home theaters ? dvd receivers all mps parts are lead-free and adhere to the rohs directive. for mps green status, please visit mps website under products, quality assurance page. ?mps? and ?the future of analog ic technology? are registered trademarks of monolithic power systems, inc. EV8049S-U-00A evaluation board 40 0.02 0.05 0.1 0.2 0.5 20 1 2 5 10 (l x w x h) 4.0? x 3.3? x 1.32? (10.2cm x 8.4cm x 3.4cm) board number mps ic number EV8049S-U-00A mp8049sdu
EV8049S-U-00A ? high current, dual channel power half-bridge ev8049-u-00a rev. 1.0 www.monolithicpower.com 2 10/30/2012 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2012 mps. all rights reserved. evaluation board schematic pgnd pgnd 1 pgnd 20 agnd agnd agnd agnd pgnd pgnd 50v vdr1 pgnd pgnd pgnd pwm1a pwm2b pwm2a 50v pgnd agnd 4.7k r1 pgnd 35v c2 mp8049s pgnd in4148 d3 1n4148 d2 pgnd pgnd sw2b sw2a pgnd sw1b sw1a pgnd pgnd pgnd pgnd gnd c6 100k r5 100k r6 d1 4.7v in4148 d4 1n4148 d5 fb2 c16 c12 10 r8 10 r7 10 r3 10 r2 gnd gnd gnd fault gnd pull-up 35v vdr2 spk_out2a spk_out1a nc pwm2b stdby nc pwm2a nc shdwn nc nc pwm1b /stdby pwm1a pwm1b gnd vdd 50v c4 fb1 c13 390pf c21 spk_out2b 390pf c18 l4 l3 390pf c10 spk_out1b 390pf c7 l2 l1 r4 cn1 c11 c15 c20 c9 c5 cn2 cn3 spk_out1b spk_out2b spk_out2a spk_out1a vdd vdd vdd vdd vdd1 vdd2 out1 out2 sw1 sw2 c17 c19 c14 c8 c1 c3 pgnd1b 40 vdr1 37 vdr2 34 pgnd2a 31 pwm1a 12 shdnb 15 pwm2b 18 bst1a 10 sw1a 7 vsp1 4 sw1b 1 pgnd1a 9 sw1a 6 vsp1 5 vsp1 3 bst1b 38 agnd 36 agnd 35 pgnd2a 32 n/c 11 pgnd1a 8 sw1b 2 pwm1b 13 faultb 14 pwm2a 16 stbyb 17 flt3b 19 flt2b 20 bst2b 21 sw2b 24 vsp2 27 sw2a 30 pgnd1b 39 pgnd2b 22 vsp2 28 vsp2 26 sw2b 25 bst2a 33 sw2a 29 pgnd2b 23 u1 100k r9 100k r10 agnd nc gnd flt3 flt2 agnd pgnd
EV8049S-U-00A ? high current, dual channel power half-bridge ev8049-u-00a rev. 1.0 www.monolithicpower.com 3 10/30/2012 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2012 mps. all rights reserved. EV8049S-U-00A bill of materials qty ref value description package manufacturer part number 2 c1, c2 1000uf cap/1000uf/radial/35v radial jiang hai cd263-35v1000 2 c3, c4 1 f cap/1uf/1206/50v/x7r 1206 tdk c3216x7r1h105k 4 c5, c9 c17, c20 0.22 f cap/0.22uf/film/50v radial panasonic ecqv1h224jl 1 c6 0.1 f cap/0.1uf/0603/50v/x7r 0603 tdk c1608x7r1h104k 4 c7, c10 c18, c21 390pf cap/390pf/0603/50v/x7r 0603 tdk c1608cog1h391j 2 c8, c19 0.47 f cap/0.47uf/film/50v radial panasonic ecqv1h474jl 4 c11, c12 c15, c16 0.1 f cap/0.1uf/0805/50v/x7r 0805 tdk c2012x7r1h104k 2 c13, c14 1 f cap/1uf/0603/25v/x7r 0603 murata grm188r7e105ka12 d 1 r1 4.7k res/4.7k/0603/5% 0603 yageo rc0603jr-074k7l 4 r2, r3 r7, r8 10 res/10/0603/1% 0603 yageo rc0603fr-0710rl 5 r4, r5 r6, r9 r10 100k res/100k/0603/1% 0603 yageo rc0603fr-07100kl 1 d1 4v7 sod323/bzt52c4v7s-7 sod-323 diodes bzt52c4v7s 4 d2,d3 d4, d5 in4148w 1n4148w-7/sod123 sod-123 diodes 1n4148w 2 fb1, fb2 6a ferrite/bead 1206 murata blm31pg330sh1l 4 l1, l2 l3, l4 22 h 3.26a/22uh/inductor radial toko 13rhbp-a7502by- 220m 2 cn1 vdd banana connector radial any gnd banana connector radial any 2 cn2, cn3 conn speaker terminal radial any 2 i/o conn sip 2.54mm * 40 pin radial any 1 u1 mp8049s class d power st age qfn40_5*5 mps mp8049sdu
EV8049S-U-00A ? high current, dual channel power half-bridge ev8049-u-00a rev. 1.0 www.monolithicpower.com 4 10/30/2012 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2012 mps. all rights reserved. printed circuit board layout figure 1?top and top silk layer figure 2? bottom and bottom silk layer
EV8049S-U-00A ? high current, dual channel power half-bridge ev8049-u-00a rev. 1.0 www.monolithicpower.com 5 10/30/2012 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2012 mps. all rights reserved. quick start guide the EV8049S-U-00A comes pre-configured to operate as a stereo btl (bridge-tied load) audio power driver, where a complementary pwm modulated audio signal (pwm and pwm ) is used an input, and music is played to speakers connected to the outputs. please follow the steps in the quick start guide for stereo btl operation section. pwm input and logic i/o vdd gnd cn1 mp8049s demo board ev8049 s-u-00 a www. monolithicpower.com mps confidential for mps customer use only cn2 cn3 spk out1a spk out1b spk out2a spk out2b power supply speaker outputs figure 3 EV8049S-U-00A connection diagram quick start guide for stereo btl operation input/output requirements 1. power supply (cn1): 5v to 26v. 2. complementary pwm signal source (pwm, pwm ). 3. speaker load (cn2 and cn3): 6 ? to 8 ? . setup condition for operation 4. connect the speakers between spk_out1a and spk_out1b, spk_out2a and spk_out2b terminals. 5. connect a pwm signal source to pwm1a / pwm2a and the complementary signal source pwm to pwm1b / pwm2b, respectively. use the gnd terminal between pwm1a and pwm1b / pwm2a and pwm2b as the ground connection for the pwm inputs. 6. apply power to the board. 7. audio should be heard through the speakers.
EV8049S-U-00A ? high current, dual channel power half-bridge notice: the information in this document is subject to change wi thout notice. please contact m ps for current specifications. users should warrant and guarantee that third party intellectual property rights ar e not infringed upon when integrating mps products into any application. mps will not assume any legal responsibility for any said applications. ev8049-u-00a rev. 1.0 www.monolithicpower.com 6 10/30/2012 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2012 mps. all rights reserved. instructions for pwm input and logic i/o pin i/o description pwm1a pwm1b pwm2a pwm2b input accept ttl level pwm signal fo r driving each of the half bridge shdnb input active low, pull low to shut off the mp8049s stbyb input active low, pull low to enter standby mode (turn all the switches to high impedance) faultb output faultb will be pull lo w once ocp or otp is triggered fltb2 fltb3 output error reporting, details please refer to the below table fltb2 fltb3 ocp otp uvp 1 1 0 0 0 0 1 0 0 1 1 0 0 1 0 0 0 1 0 0 note: for more details, please find the datasheet of mp8049s.
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